Romit Dasgupta

Driving the architecture and technical strategy for a next-generation autonomous driving compute platform in the Vehicle Software Engineering team, bridging SoC hardware capabilities with safety-critical software requirements.

• Defining the system architecture for the next-generation autonomous driving platform, evaluating compute topologies and software partitioning strategies across safety-critical and non-safety domains
• Owning the SoC vendor technical relationship—leading platform bring-up, hardware evaluation, roadmap alignment, and capability assessments to inform multi-year platform decisions
• Driving safety-aware design reviews
• Providing technical mentorship and architectural guidance across the team, raising the bar on systems-level design rigor

Leading Safety Engineering efforts within the Software Defined Vehicle (SDV) team, focusing on safety-critical platform software for next-generation vehicle architectures.

• Leading Safety Engineering initiatives for the SDV platform with emphasis on Qualcomm Ride SoC platforms
• Driving Safety-related Hypervisor investigations to ensure isolation and integrity of safety-critical partitions
• Focussing on the abstraction of the lower layer platform software to allow for multiple System on Chip (SoC) architectures to coexist

At Apple Cloud, I served as a generalist systems engineer delivering production-grade software solutions for Apple-designed hardware in the data center. My work spanned embedded systems, networking, and virtualization, integrating tightly with hardware and firmware teams to drive cloud-scale deployments.

• Led an effort to validate NVidia GPU before deployment in Apple Cloud Services
• Prototyped and demonstrated solutions on novel data center hardware (Networking, GPU)
• NCSI protocol development from scratch for BMC controller
• Technical presentation to senior management of prototypes leading up to program level approval and subsequent deployment
• Design and development of new infrastructure solutions for hardware and software

At Google, I contributed to multiple cross-disciplinary initiatives spanning Google Cloud Platform, Android infrastructure, data center automation, and IoT. My work emphasized system integration, interface definition, and scaling infrastructure—often bridging teams across hardware and software domains.

• Led design of software interface for machine automation in data center operations
• Developed Android on Google Cloud VM instances with guest-host communication
• Built complete end-to-end BLE-based asset tracking device
• Solved critical issues from BLE bandwidth congestion
• Led Micro-controller selection for next-gen products with multi-year battery life

At Microsoft, I worked across the Windows OS, Surface hardware, and Azure Cloud teams, delivering features at the intersection of operating systems, device platforms, and cloud services. My contributions spanned low-level kernel development, system architecture exploration.

• Owned and delivered 'Deep Sleep' power management feature for Windows 10
• Explored new processor architectures for Microsoft Surface devices
• Added authentication between microservices for Azure Media Streaming

At Apple, I owned and led the development of key iOS kernel-level power management components, collaborating closely with silicon design teams to define and implement the power architecture for multiple generations of Apple System-on-Chips (up to A7). My work spanned the entire hardware-software stack, from ROM and firmware to kernel drivers and performance optimization—shaping how power is managed in millions of iPhones, iPads, and Apple TVs.

• Led iOS kernel-level power management (iPhone, iPad, Apple TV)
• Key involvement in power management features design and implementation
• Collaborated with Silicon design engineers
• Worked across layers from ROM code to driver and instrumentation software

Led software development for power management and USB subsystems across multiple TI SoCs, including OMAP3x and DaVinci platforms. Worked at the intersection of Linux kernel, firmware, and SoC bring-up, contributing both to proprietary product code and the open-source community.

• Lead member of OMAP power management software team (team size 6)
• Contributor in USB 3.0 and USB 3.1 specification
• Contributed mainline Linux kernel patches
• Developed Host/Gadget OTG USB driver on PrOS

Worked on porting a kernel-space embedded database engine for Windows CE 6.0

• Ported kernel space embedded database engine from WinCE 5.0 to WinCE 6.0
• Delivered solution within 4 months

Played a critical role in OS-level system validation for both Sun SPARC and AMD Athlon x86-based platforms, bridging low-level hardware behavior with operating system correctness. Focused on deep verification of memory and processor subsystems under both Solaris and Linux environments.

• OS-level system validation of SUN Sparc and x64 servers
• Verified DTLB cache for Sparc under Linux and Solaris
• Wrote kernel driver to enable ECC in DRAM controller

Contributed to the control plane software stack for Cisco’s terabit-scale routers, focusing on packaging, system robustness, and integration with real-time operating systems for high-availability networking.

• Control plane of Cisco Terabit routers
• Implemented installation and rollback features of software package management

Designed and implemented an EDA (Electronic Design Automation) tool optimizer using Genetic Algorithms, aimed at improving the efficiency of digital design workflows.

• EDA Tools group of the VLSI division
• Ported layout tool from C to Java
• Added Genetic-Algorithm based Optimization module

Started my career evaluating the performance and correctness of Java compilers and runtimes, contributing to early benchmarking and tooling efforts for Java virtual machines.

• Java compiler and runtime evaluation team
• Wrote tests for www.nullstone.com
• Found and reported optimizer bug in Visual J++